1. Field of the Invention
The present invention relates to a semiconductor device which can communicate data by wireless communication. In particular, the invention relates to a semiconductor device including a clock generation circuit inside, which generates a clock not depending on a signal of wireless communication. Further, the invention relates to an electronic device including the semiconductor device.
2. Description of the Related Art
In recent years, it is called ubiquitous information society that an environment in which it is possible to access an information network anytime and anywhere has been put into place. In such environment, an individual identification technique has attracted attention in which an ID (Individual Identification number) is given to an individual object to clarify records of the object so that it is useful for production, management, and the like. Among them, an RFID (Radio Frequency IDentification) technique using a semiconductor device which can communicate data by wireless communication such as an RFID tag (also called an IC tag, an RF tag, a wireless tag, or an electronic tag) has been used.
A common structure of a semiconductor device which can communicate data by wireless communication is described with reference to FIG. 2. A semiconductor device 201 which can communicate data by wireless communication includes an antenna 202 and a semiconductor integrated circuit 211. The semiconductor integrated circuit 211 includes circuit blocks of a high frequency circuit 203, a power supply circuit 204, a reset circuit 205, a clock generation circuit 206, a data demodulation circuit 207, a data modulation circuit 208, a control circuit 209, a memory circuit 210, and the like. A radio signal is received by the antenna 202. The radio signal is transmitted to the power supply circuit 204 through the high frequency circuit 203, and power is generated. This power is supplied to a plurality of circuits which form the semiconductor integrated circuit 211. On the other hand, a signal demodulated by the data demodulation circuit 207 through the high frequency circuit 203 and a signal which passes through the reset circuit 205 through the high frequency circuit 203 are transmitted to the control circuit 209. Then, the signals transmitted to the control circuit 209 are analyzed by the control circuit 209. Information stored in the memory circuit 210 is output in accordance with an analyzed signal. Information output from the memory circuit 210 is encoded through the control circuit 209. In addition, an encoded signal is transmitted as the wireless signal by the antenna 202 through the data modulation circuit 208.
In the circuit blocks shown in FIG. 2, a digital signal is input and output in each of the clock generation circuit 206, the control circuit 209, and the memory circuit 210. Among them, the clock generation circuit 206 is a block which generates a reference signal for exactly operating the digital circuit portion, and a function thereof is important. A PLL (Phase Locked Loop) circuit is usually used for such a clock generation circuit 206. As specific examples of a PLL circuit, circuits with various methods, for example, including circuits disclosed in Reference 1: Japanese Published Patent Application No. H7-326964 and Reference 2: Japanese Published Patent Application No. H10-233768 have been developed.